> ## Content Index > Fetch the complete content index at: https://www.sotkn.com/llms.txt > Use this file to discover other available public pages before exploring further. # What Is a Photomask? Who Gets Paid Before a Chip Prints - URL: https://www.sotkn.com/explained/photomask-explained/ - Published: 2026-11-08T01:26:08.000Z - Updated: 2026-11-08T01:26:08.000Z - Description: A photomask is the glass plate that carries one layer of a chip’s pattern. Every new design needs a full set before a single wafer prints, and AI chips are pushing the EUV mask, its blank and its inspection to the front of the queue. - Author: Sean - Tags: Mechanism, #desk-explained EXPLAINED · Mechanism · Last reviewed: 8 Nov 2026 · Next review: after Photronics’ fourth-quarter fiscal 2026 results (December 2026) and Lasertec’s next quarterly order intake A photomask is a glass plate that carries the pattern for one layer of a chip. A lithography scanner shines light through or off it to print that layer onto a silicon wafer. **In short.** A photomask is the glass plate that carries one layer of a chip’s pattern. Every new design needs a full set before the first wafer prints, and the newest processes need more masks and more EUV masks. Most masks are made by chipmakers in their own shops; merchant makers such as Tekscend and Photronics sell the rest. Our read: the stuck step is EUV mask capacity, meaning the mirror-coated blank, the electron-beam writer and the inspection tool. The clock is merchant EUV lines from 2027 and how fast inspection orders turn into shipped tools. Why an investor cares: a chip cannot be made until its full mask set exists, so mask makers are paid before the first wafer and before the chip earns a cent. More AI designs on the newest processes mean more masks per design and more of the hardest kind. Our [EUV lithography Explained](https://www.sotkn.com/explained/euv-lithography-explained/) covers the scanner; this page covers the plate that goes inside it. ## What is a photomask? A photomask is the master copy of one chip layer. It is a plate of very flat glass with the layer’s pattern drawn on it in an opaque or absorbing film. People in the industry also call it a reticle, especially when it sits inside a scanner. ASML, which makes the scanners, describes the mask as a blueprint that light is projected through, with a pattern four times larger than the one printed on the chip. The scanner’s optics shrink it down. One mask prints the same layer onto thousands of wafers, so a single flaw on the plate becomes a flaw on every chip. A chip is built in layers: transistors at the bottom, then many layers of wiring on top. Each patterned layer needs its own mask. The group of masks for one design is called a mask set. ## How does a photomask work in a chip fab? The wafer is coated with a light-sensitive resist. The scanner shines light through or off the mask, the shrunk pattern lands on the resist, and later steps etch or deposit material where the light fell. Then the next layer gets the next mask. Older and mid-range layers use deep ultraviolet light that passes through a quartz mask with a chrome pattern. Extreme ultraviolet light is different. Tekscend explains in its annual filing that EUV light is absorbed by glass, so EUV scanners and EUV masks are both reflective. An EUV mask is a mirror with an absorbing pattern on top, not a window. The newest processes use more EUV masks. TrendForce reported in July 2024 that Samsung’s 3nm process uses 20 EUV mask layers and that its 2nm process would rise to the late twenties. Those are reported figures, not company guidance, but the direction is the point: each node step adds EUV layers, and each EUV layer adds an expensive mask. ## How is a photomask made? A mask passes through a short chain of specialist steps. Each step has few suppliers, which is why the chain matters to investors. | Step | What happens | Who does it | Why it can bind | | ----------------------- | ------------------------------------------------------------------------------------------------ | ------------------------------------------------------------------------ | -------------------------------------------------------- | | **1\. Blank** | A flat glass plate is polished and coated. EUV blanks carry a mirror stack and an absorber layer | Specialist glass and materials makers, such as AGC | Few suppliers; defects in the blank print on every wafer | | **2\. Write** | An electron-beam writer draws the pattern into a resist on the blank | Mask shops, on multi-beam writers such as those from IMS Nanofabrication | Writers are expensive and slow for the densest layers | | **3\. Etch and repair** | The pattern is etched; defects are fixed | Captive and merchant mask shops | Yield loss sends the plate back | | **4\. Inspect** | Tools compare the mask to the design and hunt for printable defects | Inspection makers; Lasertec for actinic EUV inspection | Each EUV mask must pass before it ships | | **5\. Ship the set** | The full mask set goes to the fab and into the scanner | Captive shop or merchant supplier | No full set, no first wafer | Steps simplified. Supplier examples are illustrative, not a ranking. Why each step can bind is our read. The blank comes first. AGC said in April 2023 it would lift its EUV blank capacity by about 30% by 2025 at its Koriyama plant in Japan, with support from Japan’s trade ministry. In its June 2026 briefing it described itself as the only blank maker that runs the whole process from glass material to polishing and coating, and said High-NA EUV blanks are in development. Then the pattern is written. Multi-beam electron writers from IMS Nanofabrication draw the densest EUV patterns. When Intel sold about 10% of IMS to TSMC in September 2023 for up to $432.8 million, the deal valued IMS at about $4.3 billion, after an earlier near-20% sale to Bain Capital. A chipmaker buying into its mask-writer supplier tells you how much the step matters. Then the mask is inspected. Lasertec makes actinic inspection tools, which check EUV masks using EUV-wavelength light. In its June 2026 business report it said its new ACTIS A200HiT inspects three times faster than the ACTIS A150 it replaces. ## Who makes photomasks? Mostly the chipmakers. Citing SEMI’s 2024 photomask study, Tekscend put captive mask shops, run by chipmakers for themselves, at 63% of the market and merchant mask makers at 37%. Leading-edge foundries and memory makers keep their newest masks in-house because the mask is part of the process recipe. | Figure | Value | What it tells you | | ------------------------------------------- | ------------------- | ----------------------------------------------------------------------------------- | | **Captive share of photomask market, 2024** | 63% | Chipmakers make most of their own masks, including the newest | | **Merchant share, 2024** | 37% | The part sold by independent mask makers | | **Merchant market, 2024 → 2030 estimate** | \~$2.1bn → \~$3.4bn | About 62% growth over six years (our arithmetic on a company-commissioned estimate) | | **Implied whole market, 2024** | \~$5.7bn | Our arithmetic: $2.1bn ÷ 37%; rough | | **Tekscend share of merchant sales, 2024** | 38.9% | About 14% of the whole market (our arithmetic) | Shares are from SEMI’s 2024 photomask study as cited by Tekscend; the 2030 figure is an estimate Tekscend commissioned. Implied totals are our arithmetic and approximate. ![Photomask market 2024: captive mask shops 63%, merchant mask makers 37%, Tekscend about 14% of the whole market](https://storage.ghost.io/c/cd/10/cd10e222-131f-4ba4-b4a9-ca4214e8c12d/content/images/2026/11/photomask-explained-who-makes-masks.png) Who makes the world’s photomasks. Second Order arithmetic on SEMI data cited by Tekscend. Tekscend, spun out of Japan’s Toppan group, is the biggest merchant. It reported revenue of ¥129.6 billion for the year to March 2026, up 9.8%, with an operating margin of about 21% by our arithmetic. It said chipmakers that make their own masks are running short of internal capacity, and that memory makers in particular are expected to outsource more as they focus on the newest memory for AI. Photronics is the main US-listed merchant. In the quarter to 2 August 2026 it reported revenue of $216.0 million, up 2.7% from a year earlier, of which $154.7 million, or about 72%, came from chip masks (our arithmetic). High-end chip masks reached a record 44% of chip mask revenue, which is about $68 million by our arithmetic. The company said delayed design releases were recovering and that busy fabs were pushing designs onto newer processes. Our [guide to who makes advanced packaging](https://www.sotkn.com/explained/who-makes-advanced-packaging/) covers the other merchant service layer that sits downstream of the fab. ## Why do AI chips need more photomasks? Three things push mask demand up together. There are more designs, because hyperscalers are building their own accelerators alongside NVIDIA and AMD. Each design sits on a newer process with more layers. And more of those layers are EUV, which is the costliest mask to make and inspect. The suppliers say so in their own reports. Lasertec’s orders for the year to June 2026 rose to ¥237.5 billion from ¥105.2 billion, up about 126%, and it tied that to AI demand for CPUs, GPUs and HBM. Orders ran about 1.03 times sales (our arithmetic), so the order book was still filling. Our [guide to custom AI chips](https://www.sotkn.com/explained/who-makes-custom-ai-chips/) covers the design wave behind the new tape-outs, and our [2nm chip Explained](https://www.sotkn.com/explained/2nm-chip-explained/) covers the process those designs are moving to. ## Who gets paid? Our read: the mask cheque splits across four groups, and most of it is paid before the chip ships. - **Captive mask shops inside chipmakers.** The largest share. The money stays inside TSMC, Samsung, Intel and the memory makers as part of their process cost, so investors see it only in capex and margins. - **Merchant mask makers.** Tekscend and Photronics sell to foundries, memory makers and chip designers. They win when captive shops run out of room and outsource. Photronics spent $130.4 million on capital equipment in the nine months to August, about 2.1 times its depreciation (our arithmetic), so it is building ahead. - **Blank makers.** Every mask starts as a blank. AGC is one of very few EUV blank suppliers, and it ties its capacity plans to growth in EUV scanner shipments. - **Writer and inspection toolmakers.** IMS for multi-beam writers and Lasertec for actinic EUV inspection. They are paid when mask shops add capacity, before the masks themselves exist. ![Photomask explained: how a photomask gets paid, from design tape-out and blank through writing and inspection as the stuck step, to mask set and wafers](https://storage.ghost.io/c/cd/10/cd10e222-131f-4ba4-b4a9-ca4214e8c12d/content/images/2026/11/photomask-explained-how-a-mask-gets-paid.png) How a photomask gets paid. Second Order. ## Where is the stuck step? Our read: EUV mask capacity. Not one machine, but the three steps that each have very few suppliers: the mirror-coated blank, the multi-beam writer and the actinic inspection tool. A captive shop at full stretch has to choose which designs get masks first, and the leftovers go to merchants that are still building EUV lines. The clocks are visible. Tekscend said it is preparing EUV lines in Japan, a new plant in Singapore and new lines in the US and Korea, with production starting from 2027\. Photronics is building in the US and Korea. Lasertec’s order book has to turn into shipped and installed tools. Until those land, outsourced EUV masks stay scarce. For readers in Singapore, Tekscend’s planned plant puts a piece of the mask chain on the island, next to the region’s fabs. Our [Taiwan market door](https://www.sotkn.com/markets/taiwan/) and [Korea market door](https://www.sotkn.com/markets/korea/) track the fabs those masks feed. ## What would change the view? - **Captive shops add enough EUV capacity.** If foundries and memory makers keep all EUV masks in-house, merchant growth slows to mature nodes. - **Design releases slip again.** Photronics saw delayed releases earlier in 2026\. Fewer tape-outs mean fewer mask sets, whatever the long-run trend. - **Inspection or writing gets much faster.** Tools like Lasertec’s new faster inspection system raise output per tool, which eases the bind without new plants. - **High-NA changes the mask.** High-NA EUV needs new blanks and, later, larger masks. A format change can reset who leads, as our High-NA EUV Explained page describes. ## Common misconceptions - **People assume the scanner is the only lithography bottleneck.** Actually a scanner with no mask set prints nothing; the mask chain has its own few suppliers. - **People assume merchant mask makers make the most advanced masks.** Actually captive shops inside chipmakers make most leading-edge masks; merchants are only now adding EUV. - **People assume one mask makes one chip.** Actually one mask prints one layer on thousands of wafers, and a chip needs a full set of them. - **People assume mask spending follows wafer volume.** Actually it follows the number of new designs and layers; a new tape-out needs a new set even at low volume. ## FAQ **What is a photomask?** A photomask is a glass plate that carries the pattern for one layer of a chip. A lithography scanner shines light through or off it to print that layer onto a silicon wafer. **Is a photomask the same as a reticle?** In practice, yes. A reticle is the photomask used in a stepper or scanner, which shrinks the pattern onto the wafer. ASML describes the mask or reticle pattern as four times larger than the printed one. **How many photomasks does a chip need?** One per patterned layer, so an advanced chip needs a full set. TrendForce reported that Samsung’s 3nm process uses 20 EUV mask layers alone, before counting the older-style layers. **What is an EUV photomask?** An EUV photomask reflects light instead of letting it through, because extreme ultraviolet light is absorbed by glass. It is built on a special mirror-coated blank and needs its own inspection tools. **Who makes photomasks?** Mostly chipmakers themselves. Captive shops held 63% of the market in 2024, per SEMI data cited by Tekscend. The merchant rest is led by Tekscend, with Photronics among the other suppliers. **Why do AI chips matter for photomasks?** AI pushes more designs onto the newest processes, and those processes use more masks and more EUV layers. Lasertec and Tekscend both pointed to AI chips and HBM as drivers in their latest reports. **Is this a list of stocks to buy or sell?** No. This page explains how photomasks work and where the money goes. It does not rank companies or give buy or sell calls. Not investment advice. Do your own research. Related: [EUV lithography](https://www.sotkn.com/explained/euv-lithography-explained/); [High-NA EUV](https://www.sotkn.com/explained/high-na-euv-explained/); [semiconductor yield](https://www.sotkn.com/explained/semiconductor-yield-explained/); [clean rooms](https://www.sotkn.com/explained/clean-room-explained/); [who makes wafer fab equipment](https://www.sotkn.com/explained/who-makes-wafer-fab-equipment/); [chiplets](https://www.sotkn.com/explained/chiplet-explained/). ## Stack doors Layer: [Semiconductors](https://www.sotkn.com/semiconductors/). Also: [Hyperscalers](https://www.sotkn.com/hyperscalers/). Markets: [Singapore](https://www.sotkn.com/markets/singapore/). Analysis: [where does the stuck step move](https://www.sotkn.com/analysis/where-does-the-stuck-step-move/). [Get the Wire](https://www.sotkn.com/#/portal/signup) — short daily notes when chip supply chains move. Not investment advice. Do your own research. **How we check this** How a mask is used and its four-times scale come from ASML’s lithography overview. Samsung’s EUV mask-layer count is a TrendForce report from 22 July 2024 and is labelled as reported. Captive and merchant shares and the merchant market size come from Tekscend’s first-half results briefing of 12 November 2025, which cites SEMI’s 2024 photomask study; the 2030 merchant figure is a company-commissioned estimate. Tekscend’s revenue, outsourcing comments and plant plans come from its results for the year to 31 March 2026\. Photronics figures come from its third-quarter fiscal 2026 release of 26 August 2026\. Lasertec orders and sales come from its business report for the year to 30 June 2026\. AGC’s blank capacity comes from its 27 April 2023 release and its 2 June 2026 briefing. The IMS valuation comes from Intel’s 12 September 2023 release. Shares of the whole market, growth rates, capex-to-depreciation and order-to-sales ratios are our arithmetic, checked in code and labelled as ours on the page. Who gets paid and the stuck step are our read. The featured photograph is credited in its caption. This page explains a mechanism. It does not rank companies or give buy or sell calls. Not investment advice. Do your own research. **Last reviewed:** 8 Nov 2026 · **Next review:** after Photronics’ fourth-quarter fiscal 2026 results (December 2026) and Lasertec’s next quarterly order intake Spot an error? [Tell us](mailto:sean@thekopinotes.com) and we will correct it and note the change here. [Our editorial standards →](https://www.sotkn.com/editorial-standards/) ## References 1. [ASML — Our technology (lithography overview)](https://www.asml.com/en/technology?ref=sotkn.com) — light is projected through a blueprint of the pattern, known as a mask or reticle; the blueprint is four times larger than the pattern printed on the chip 2. [TrendForce — Samsung’s 2nm node will reportedly feature 30% more EUV layers (22 Jul 2024)](https://www.trendforce.com/news/2024/07/22/news-samsungs-2nm-node-will-reportedly-feature-30-more-euv-layers/?ref=sotkn.com) — reported: Samsung’s 3nm node uses 20 EUV mask layers and its 2nm node rises to the late 20s; cost rises with the number of EUV mask layers 3. [Tekscend Photomask — first-half fiscal 2026 results briefing (12 Nov 2025)](https://www2.jpx.co.jp/disc/429A0/140120251112597119.pdf?ref=sotkn.com) — citing SEMI’s 2024 Photomask Characterization Study: captive mask shops 63.0% of the market, merchant 37.0%; Tekscend 38.9% of merchant sales; merchant market about $2.1 billion in 2024 and $3.4 billion by 2030 on company-commissioned estimates; Singapore plant planned 4. [Tekscend Photomask — consolidated results for the year ended 31 March 2026 (13 May 2026)](https://finance.stockweather.co.jp/contents/dispPDF.aspx?disclosure=20260513528465&ref=sotkn.com) — revenue ¥129.6 billion, up 9.8%; operating profit ¥27.5 billion; outsourcing rising as chipmakers with in-house mask shops hit resource limits, especially memory makers; new Singapore plant, US and Korea lines and EUV lines in Japan, production from 2027 5. [Photronics — third-quarter fiscal 2026 results (26 Aug 2026)](https://photronicsinc.gcs-web.com/news-releases/news-release-details/photronics-reports-third-quarter-2026-results?ref=sotkn.com) — revenue $216.0 million, up 2.7% year-over-year; IC revenue $154.7 million; high-end IC a record 44% of IC revenue; delayed design releases recovering; nine-month capital spending $130.4 million 6. [Lasertec — business report for the year ended 30 June 2026](https://www.lasertec.co.jp/en/ir/plan/message.html?ref=sotkn.com) — orders ¥237.5 billion against ¥105.2 billion a year earlier; net sales ¥230.5 billion, down 8.3%; AI demand for CPUs, GPUs and HBM cited; ACTIS A200HiT actinic EUV patterned-mask inspection three times faster than ACTIS A150 7. [AGC — AGC to boost production capacity of EUVL photomask blanks (27 Apr 2023)](https://www.agc.com/en/news/detail/1203819%5F2814.html?ref=sotkn.com) — EUV mask blank capacity to rise about 30% by 2025 at AGC Electronics in Koriyama, backed by Japan’s METI supply-chain programme; target of more than ¥40 billion in sales by 2025 8. [AGC — semiconductor-related business briefing (2 Jun 2026)](https://www.agc.com/en/ir/library/bizbriefing/pdf/2026%5F0602esemiconductor.pdf?ref=sotkn.com) — AGC describes itself as the only blank maker covering the whole process from glass material to polishing and deposition; High-NA EUV blanks under development 9. [Intel — Intel to sell minority stake in IMS Nanofabrication business to TSMC (12 Sep 2023)](https://www.intc.com/news-events/press-releases/detail/1645/intel-to-sell-minority-stake-in-ims-nanofabrication?ref=sotkn.com) — TSMC to buy about 10% of IMS for up to $432.8 million, valuing IMS at about $4.3 billion, after a near-20% stake sale to Bain Capital; IMS leads multi-beam mask writers for EUV S **[Sean](https://www.sotkn.com/author/sean/)** Writes Second Order by TKN — a plain-English map of AI infrastructure and semiconductors for non-specialist investors. Focus: who gets paid, where money sticks, and which step is stuck. Covers AI infrastructure, semiconductors, and second-order stack reads. [Author page →](https://www.sotkn.com/author/sean/) · [Editorial standards →](https://www.sotkn.com/editorial-standards/)