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# Who Makes HBM
- URL: https://www.sotkn.com/explained/who-makes-hbm/
- Published: 2026-09-23T01:22:27.000Z
- Updated: 2026-09-23T08:41:42.000Z
- Description: Who makes HBM is the map of roles along the stack — memory makers, package attach, and tools that clear supply. Roles only. No tip sheet.
- Author: Sean
- Tags: Players, #desk-explained

EXPLAINED · Players · Last reviewed: 23 Sep 2026 · Next review: after next JEDEC HBM update or major SK hynix / Samsung / Micron HBM product note

Who makes HBM is the roles map for high-bandwidth memory: which firms build the DRAM stacks, which partners attach those stacks beside an accelerator on advanced packaging, and which tools and materials gate how fast supply can rise.

**In short.** Who makes HBM is a roles map on the [semiconductors](https://www.sotkn.com/stack/semiconductors/) layer: DRAM stack makers build the cubes; packaging/foundry partners attach them beside accelerators; tools and materials gate how fast stacks can rise. The stuck step sits at scarce stacks and package attach — not a tip sheet.

For investors on the Semiconductors layer, the useful question is which role gets paid when AI CapEx binds scarce stacks and packaging — not which ticker “wins.” For the mechanism, see [what HBM is](https://www.sotkn.com/explained/hbm-explained/); for the attach gate, see [what CoWoS is](https://www.sotkn.com/explained/cowos-explained/).

## Who makes HBM?

Who makes HBM splits into three roles. DRAM stack makers fabricate and stack the memory cube. Foundry and advanced-packaging partners attach that cube beside the accelerator. Tool and materials suppliers clear the stacking and process steps that gate how fast cubes can ship. JEDEC’s HBM4 standard (JESD270-4, 16 April 2025) sets the interface envelope — up to about 2 TB/s on a 2048-bit bus — but does not name who clears which role.

![Who makes HBM — three roles along the stack chain](https://storage.ghost.io/c/cd/10/cd10e222-131f-4ba4-b4a9-ca4214e8c12d/content/images/2026/09/who-makes-hbm-roles-chart.png)

Roles map: DRAM stack makers, package/foundry attach, tools that gate stacks. Not a market-share tip sheet.

| Role                               | Job                                           | Dated example (labelled)                                                                                                                               |
| ---------------------------------- | --------------------------------------------- | ------------------------------------------------------------------------------------------------------------------------------------------------------ |
| DRAM stack makers                  | Build HBM cubes (dies + stack + base die)     | SK hynix 12-Hi HBM3E volume production (26 Sep 2024); Micron HBM3E 12-Hi >1.2 TB/s (5 Sep 2024); Samsung HBM4 commercial ship (12 Feb 2026)            |
| Foundry / packaging attach         | Place stacks beside logic on advanced package | TSMC CoWoS integrates SoC + HBM; CoWoS-L in volume since 2024 (TSMC product page). TrendForce: CoWoS-L mainstream through 2028 (18 Sep 2026, reported) |
| Tools / materials that gate stacks | Stacking equipment and process materials      | TC bonders stack DRAM into HBM; Yonhap 8 Jun 2026 reported SK hynix → Hanmi ₩44.2bn TC-bonder order for HBM4                                           |

## Who builds the DRAM stacks?

Stack makers are the memory suppliers that ship HBM cubes. SK hynix announced volume production of the industry’s first 12-layer HBM3E at 36 GB on 26 September 2024 (SK hynix Newsroom) — company-reported product claims. On 12 September 2025 it said HBM4 development was complete and a mass-production system was ready, with operating speed above 10 Gbps versus the JEDEC HBM4 envelope of 8 Gbps (company-reported).

Micron, on 5 September 2024, said it was shipping production-capable HBM3E 12-high 36 GB units with more than 1.2 TB/s at pin speeds above 9.2 Gb/s, and noted CoWoS / OSAT collaboration. Samsung announced HBM4 mass production and commercial shipments on 12 February 2026, citing 11.7 Gbps consistent speed (company-reported).

Those dates show the role, not a ranking. Generations move from HBM3E into HBM4; the job — build the cube — stays in the stack-maker bucket. Contrast with board-level memory in [HBM vs GDDR](https://www.sotkn.com/explained/hbm-vs-gddr/) — same DRAM family tree, different attach and who clears first when AI orders hit.

## Who attaches HBM to the accelerator?

HBM only becomes useful when it sits beside the GPU or ASIC on an advanced package. TSMC’s CoWoS family places SoCs and HBM stacks on an interposer or local-silicon-bridge package; CoWoS-L has been in volume production since 2024 (TSMC CoWoS page). That is a packaging/foundry role — attach and interconnect — not DRAM fabrication. See also [foundry and advanced packaging](https://www.sotkn.com/explained/foundry-advanced-packaging-explained/).

TrendForce (18 Sep 2026) keeps CoWoS-L as the mainstream AI packaging path through 2028 on maturity and yield versus EMIB-T — reported research, not a TSMC filing. When package slots are short, cash sticks at attach capacity; stack makers can still wait even when cubes exist.

## Who supplies the tools that gate stacks?

Building taller HBM cubes needs stacking equipment. Thermal-compression (TC) bonders press and heat DRAM dies into stacks — a core process step memory makers buy when they expand HBM capacity. Yonhap reported on 8 June 2026 that SK hynix ordered TC bonders from Hanmi Semiconductor in a ₩44.2 billion (about US$28.7 million) regulatory filing for HBM4, with industry watchers reading roughly 15 units — **reported**, not guided. For the equipment gate in more depth, see [memory process tools for HBM](https://www.sotkn.com/explained/memory-process-tools-hbm-explained/).

## Who gets paid — and where is the stuck step?

On the Semiconductors layer, who gets paid tracks which role clears first when AI CapEx orders arrive. Stack makers clear when scarce cubes are allocated; packaging clears when CoWoS-class slots bind; toolmakers clear when stacking capacity expands. The stuck step is usually stack supply plus package attach together — orders can rise while installs wait.

![Who makes HBM — who gets paid and the packaging stuck step](https://storage.ghost.io/c/cd/10/cd10e222-131f-4ba4-b4a9-ca4214e8c12d/content/images/2026/09/who-makes-hbm-infographic.png)

Stuck step: scarce HBM stacks and advanced-package attach. Tools clear stacking capacity.

Korea markets door where memory allocation bites: [Korea HBM — who gets paid when AI memory stays scarce](https://www.sotkn.com/markets/korea/korea-hbm-memory-september-2026/). Wire on the packaging clock: [CoWoS-L stays the packaging path through 2028](https://www.sotkn.com/wire/cowos-l-mainstream-through-2028-wire/). Analysis on where the bind moves next: [If packaging catches up, where does the stuck step move?](https://www.sotkn.com/analysis/where-does-the-stuck-step-move/).

## Common misconceptions

- **People assume “who makes HBM” means one company.** Actually three roles share the chain: stack makers, package attach, and tools/materials. Missing any one role leaves the accelerator waiting.
- **People assume TSMC makes the HBM cube.** Actually CoWoS attaches memory makers’ stacks beside logic. The foundry/packaging partner does not fabricate the DRAM stack.
- **People treat a market-share table as a tip sheet.** Actually this page maps roles and stuck steps. Share prints from trade press are labelled reported and are not buy/sell advice.
- **People assume JEDEC ceilings equal shipping SKUs.** Actually standards set envelopes (e.g. HBM4 up to \~2 TB/s, 16 Apr 2025). Vendor bins and product pages are the shipping claims.

## FAQ

**Who makes HBM?**  
HBM stacks are built by DRAM memory makers — principally SK hynix, Samsung, and Micron — then attached beside an accelerator on advanced packaging such as TSMC CoWoS. Tools such as thermal-compression bonders gate how fast stacks can be built. This is a roles map, not a stock tip sheet.

**Who manufactures HBM memory chips?**  
The DRAM dies and finished stacks come from memory suppliers. SK hynix began volume production of 12-layer HBM3E on 26 September 2024; Micron shipped production-capable HBM3E 12-high units as of 5 September 2024; Samsung announced HBM4 mass production and commercial shipments on 12 February 2026 (company-reported).

**Does TSMC make HBM?**  
No. TSMC’s CoWoS-class advanced packaging integrates logic dies with HBM stacks supplied by memory makers. The foundry/packaging partner attaches the stack; it does not fabricate the DRAM cube itself (TSMC CoWoS product page; Micron notes CoWoS collaboration, 5 Sep 2024).

**What tools gate HBM stack supply?**  
Thermal-compression (TC) bonders stack DRAM dies into HBM cubes. Yonhap reported on 8 June 2026 that SK hynix ordered Hanmi TC bonders in a ₩44.2 billion filing for HBM4 — labelled as reported, not guidance.

**Who gets paid when HBM is scarce?**  
Cash sticks first at stack makers when AI CapEx orders bind scarce cubes, and at advanced packaging when CoWoS-class slots are the short clock. Toolmakers get paid when memory makers expand stacking capacity. TrendForce (18 Sep 2026) keeps CoWoS-L as mainstream AI packaging through 2028 — reported research, not a company filing.

**Is this a list of the best HBM stocks?**  
No. Second Order Players pages map roles and stuck steps. They do not rank tickers, give buy/sell calls, or treat market-share tables as investment advice.

## Related terms

- [HBM](https://www.sotkn.com/explained/hbm-explained/) — what high-bandwidth memory is.
- [CoWoS](https://www.sotkn.com/explained/cowos-explained/) — the packaging attach that sits next to HBM.
- [Memory process tools](https://www.sotkn.com/explained/memory-process-tools-hbm-explained/) — equipment that gates how fast HBM capacity can rise.
- [HBM vs GDDR](https://www.sotkn.com/explained/hbm-vs-gddr/) — stack-on-package versus board-level graphics DRAM.

## Markets and stack doors

Layer: [semiconductors](https://www.sotkn.com/stack/semiconductors/). Markets: [Korea HBM memory](https://www.sotkn.com/markets/korea/korea-hbm-memory-september-2026/).

## Further reading

Wire: [CoWoS-L through 2028 — packaging still binds](https://www.sotkn.com/wire/cowos-l-mainstream-through-2028-wire/). Analysis: [where the stuck step moves if packaging catches up](https://www.sotkn.com/analysis/where-does-the-stuck-step-move/).

[Get the Wire](https://www.sotkn.com/#/portal/signup) — short notes when memory or packaging clocks move.

**How we check this**

Figures come from company filings and government releases, each dated in the list below. Capacity and timing from press reports are labelled as reported, not guided. Where we work something out ourselves, the arithmetic is shown in full.

**Last reviewed:** 23 Sep 2026 · **Next review:** after next JEDEC HBM update or major SK hynix / Samsung / Micron HBM product note

Spot an error? [Tell us](mailto:sean@thekopinotes.com) and we will correct it and note the change here.

[Our editorial standards →](https://www.sotkn.com/editorial-standards/)

## Sources

- [BusinessWire / JEDEC — HBM4 (JESD270-4); up to \~2 TB/s on 2048-bit interface (16 Apr 2025)](https://www.businesswire.com/news/home/20250416843598/en/JEDEC-and-Industry-Leaders-Collaborate-to-Release-JESD270-4-HBM4-Standard-Advancing-Bandwidth-Efficiency-and-Capacity-for-AI-and-HPC?ref=sotkn.com)
- [SK hynix Newsroom — volume production of 12-layer HBM3E 36 GB (26 Sep 2024)](https://news.skhynix.com/en/sk-hynix-begins-volume-production-of-the-world-first-12-layer-hbm3e/?ref=sotkn.com)
- [SK hynix Newsroom — HBM4 development complete; mass-production system ready (12 Sep 2025)](https://news.skhynix.com/en/sk-hynix-completes-worlds-first-hbm4-development-and-readies-mass-production/?ref=sotkn.com)
- [Micron — HBM3E 12-high 36 GB; >1.2 TB/s; CoWoS / OSAT collaboration note (5 Sep 2024)](https://www.micron.com/about/blog/applications/ai/micron-continues-memory-industry-leadership-with-hbm3e-12-high-36gb?ref=sotkn.com)
- [Samsung Newsroom — HBM4 mass production and commercial shipments (12 Feb 2026)](https://news.samsung.com/global/samsung-ships-industry-first-commercial-hbm4-with-ultimate-performance-for-ai-computing?ref=sotkn.com)
- [TSMC — CoWoS integrates SoCs and HBM stacks; CoWoS-L volume since 2024 (accessed 23 Sep 2026)](https://3dfabric.tsmc.com/english/dedicatedFoundry/technology/cowos.htm?ref=sotkn.com)
- [TrendForce — CoWoS-L mainstream AI packaging through 2028 (18 Sep 2026, reported research)](https://www.trendforce.com/presscenter/news/20260918-13241.html?ref=sotkn.com)
- [Yonhap — SK hynix orders Hanmi TC bonders ₩44.2bn for HBM4 (8 Jun 2026, reported from filing)](https://en.yna.co.kr/view/AEN20260608012500320?ref=sotkn.com)

S

**[Sean](https://www.sotkn.com/author/sean/)**

Writes Second Order by TKN — a plain-English map of AI infrastructure and semiconductors for non-specialist investors. Focus: who gets paid, where money sticks, and which step is stuck.

Covers AI infrastructure, semiconductors, and second-order stack reads.

[Author page →](https://www.sotkn.com/author/sean/) · [Editorial standards →](https://www.sotkn.com/editorial-standards/)