If HBM Takes ~30% of DRAM Wafers, Where Does Cash Stick?

ANALYSIS · MEMBERS CONTINUE · 3 min free / 12 min full · Data as at 1 Oct 2026

When industry HBM is set to take nearly 30% of DRAM wafers — up from about 20% — and CoWoS-class attach still binds the finished module, the money question is not whether memory is scarce. It is where cash sticks on the semiconductor map before a customer uses a working GPU and pays for that hour.

In short

• The question: if HBM takes ~30% of DRAM wafers, where does cash stick before the billed hour?
• The answer: Scenario B — allocation and attach both bind. Cash sticks mid-chain at suppliers with allocated HBM starts that clear into stacks, and at attach/packagers who turn those stacks into modules — before the billed GPU hour. Wafer starts ≠ finished module ≠ paid hour
• Why: on 29 September 2026, Samsung EVP Kim Taewoo said HBM should take nearly 30% of industry DRAM wafer capacity next year, from about 20% now, on the same wafer pool as standard DRAM. TrendForce restates the bit asymmetry: ~30% of wafers → only ~13% of DRAM bit supply. The same week, SK hynix won TSMC Partner of the Year again for early HBM5↔CoWoS validation — an attach milestone, not volume. Today's Semiconductors Stack leads HBM BEFORE MODULE
  Behind the wall: three scenarios with the arithmetic · mix-shift + bit/wafer maths · six practical takeaways · Members' FAQ
• What would break it: CoWoS-class attach clearing and HBM wafer share stalling below the ~30% path — so cash reaches billed hours without a mid-chain bind
• Nothing here is a recommendation. This is a map of what today's prints already assume, with the working shown

What's in this piece: the numbers that matter · why wafer share sits before the billed hour · what the map assumes in one line · members from here · who gets paid · three scenarios, arithmetic shown · our read · what would change the view · practical takeaways · FAQ · sources

The numbers that matter

Chart 1 — Industry HBM wafer claim (_20%→30%) versus the still-bound attach step. Sources: CNA/Reuters 29 Sep 2026; SK hynix Newsroom 28 Sep 2026. Education only.

Why does wafer share sit before the billed hour?

The semiconductors layer turns DRAM wafer starts into HBM stacks, then into packages beside an accelerator, then into a rack someone can bill by the hour. What Is HBM? and Who Makes HBM teach the mechanism. Cash clears when a customer uses a working GPU and pays for that hour — ready is not paid.

Three clocks sit on one chain:

1. Allocation — who gets DRAM wafer starts for HBM versus commodity DRAM on the same pool
2. Attach — CoWoS-class packaging that turns stacks into modules (CoWoS-L mainstream through 2028 per TrendForce, 18 Sep 2026)
3. Billed hour — the neocloud or hyperscaler seat that only prints cash after delivery and acceptance

On 29 September 2026, Samsung Electronics EVP Kim Taewoo said HBM is expected to account for nearly 30% of DRAM chipmakers' total wafer capacity next year, up from about 20% currently, and that HBM and standard DRAM compete for the same wafer capacity (reported: Channel NewsAsia, 29 Sep 2026; Reuters via MarketScreener, 29 Sep 2026). TrendForce's same-day restatement adds the bit asymmetry and the ~3× wafer-area intensity (TrendForce, 29 Sep 2026).

A day earlier, SK hynix's newsroom printed Partner of the Year (3DFabric-HBM Integration) for the second consecutive year — early HBM5 validated on TSMC's CoWoS (SK hynix Newsroom, 28 Sep 2026; our Wire). Validation is the attach clock ringing. It is not a shipment volume and not a billed hour.

Yesterday's Samsung company Analysis asked what one equity price assumes about the wafer pool. The Korea mix Pulse and Korea HBM allocation Pulse track who gets paid in the memory print. Today's Stack lead is HBM BEFORE MODULE. This piece asks the map so-what: when HBM claims ~30% of DRAM wafers and attach still binds, where does cash stick before the billed hour — and what three paths would change that.

What does the map already assume?

Three candidate binds compete for the label "stuck step":

1. Allocation eases — HBM wafer share stalls or commodity DRAM capacity expands enough that the pool stop being the mid-chain bind; cash moves toward modules and hours faster
2. Dual bind (allocation + attach) — _20%→30% wafer claim and CoWoS-class attach still scarce; cash sticks at allocated HBM suppliers and packagers before the billed hour
3. Attach-only residual — wafer share lands near 30% or eases, but attach (or the reverse: attach eases first while the pool stays crowded) decides who still waits

A tip sheet would pick a ticker. Analysis works the other way: ask which bind today's dated prints already require for the Stack's semiconductor read to keep holding — then show the arithmetic members can check.

Our read, in one line: the map already assumes Scenario B — when HBM takes nearly 30% of DRAM wafers and attach still binds, cash sticks mid-chain at allocated HBM suppliers and attach/packagers before the billed GPU hour; wafer starts ≠ finished module ≠ paid hour. The three scenarios and the arithmetic are below.

The free preview ends here.

—— Still to read · ~8 of 12 minutes ——

MEMBERS CONTINUE HERE

• Three scenarios with the arithmetic
• Mix-shift + bit/wafer maths
• Six practical takeaways
• Members' FAQ