Who Makes Custom AI Chips? The Partners Behind Big Tech's ASICs

EXPLAINED · Players · Last reviewed: 17 Oct 2026 · Next review: after Broadcom's fiscal fourth-quarter 2026 results

A custom AI chip is an accelerator that a cloud company or AI lab designs for its own work instead of buying a general-purpose GPU. Most are built with a design partner, such as Broadcom, Marvell, Alchip, GUC or MediaTek, which turns the design into a chip TSMC can make and ships it.

Why an investor cares: a custom chip moves money through two companies at two different times. The design partner books revenue when chips ship. The owner earns only once those chips are racked in a powered hall and serving customers. Knowing who sits where tells you whose numbers move first. This page sits beside who makes AI chips, which maps the whole chip stack, and what a TPU is, the best-known custom chip.

Who makes custom AI chips?

Two companies, not one. The owner is the cloud company or AI lab that will run the chip. It decides what the chip is for, writes the architecture, and owns the result. Google with its TPU, Amazon with Trainium, Microsoft with Maia, Meta with MTIA and OpenAI with its first chip, called Jalapeño, are all owners.

The design partner is a chip company that turns that architecture into something a factory can make. It does the physical layout, supplies the high-speed links and memory interfaces it has already built for other chips, designs the package, and books the wafers and packaging at TSMC. In most cases it then sells the finished chip to the owner. Broadcom and Marvell call these chips XPUs; the industry also calls them AI ASICs, short for application-specific integrated circuits.

Behind both stand the same suppliers as any AI chip: TSMC for the wafers and the CoWoS packaging, and the memory makers for the high-bandwidth memory stacked beside the chip. Who makes HBM covers that last role.

Roles only, not a ranking. Sources under References.

Which partner builds which chip?

Start with Broadcom. On its 2 September 2026 call it said it had six custom accelerator customers. It named Google, whose Ironwood TPUs it was shipping in high volume, and Anthropic, which buys TPUs through Broadcom. It also named OpenAI, whose Jalapeño chip it ships, and Meta, for which it plans three generations of MTIA chips by the end of 2027.

Marvell is the other US partner. On 29 July 2026 it signed an agreement with Google to develop custom chips that attach to the TPU, including AI inference accelerators and memory and network controllers. It filed the details on 19 August 2026.

Three Taiwanese companies do the same job. Alchip said its 3-nanometre accelerator shipments to a North American cloud customer began in May 2026. Analysts identify that chip as Amazon’s Trainium3, which Amazon says is built on 3 nanometres, though Alchip does not name the customer. GUC, part-owned by TSMC, is widely presumed to build Microsoft’s Maia chips, but Microsoft has not named its partner. MediaTek, best known for phone chips, said on 31 July 2026 that its first AI accelerator for a major US cloud customer goes into production in the fourth quarter of 2026.

Pairings as the companies state them; "reported" and "presumed" where the owner has not confirmed. Sources under References.

What does a design partner actually do?

It carries the design from drawing to delivery. The owner knows what math its models need. The partner knows how to lay out tens of billions of transistors so the chip works at TSMC’s newest nodes, how to wire it to memory and to thousands of other chips, and how to get it through testing on the first attempt.

Most of the value sits in parts the owner would rather not build itself. The fastest links between chips, called SerDes, and the interfaces to high-bandwidth memory are hard to design and are reused across customers. So is the package design, which puts a processor and several memory stacks on one base and keeps them powered and cool.

There are two ways the money flows. In the first, the partner buys the wafers and packaging, sells the finished chip, and books the whole chip as revenue. Broadcom works this way, which is why its AI revenue tracks chip shipments. Alchip’s own results show the same pattern: it said its gross margin fell as production revenue grew. Our read is that more of what it sold was silicon it had paid TSMC for.

In the second, the owner buys wafers from TSMC itself and pays the partner for design work and specific parts. That gives the owner more control and the partner less revenue per chip. Either way, the chip belongs to the owner. Marvell’s filing shows how far that goes: Google decides whether Marvell may sell the custom product to anyone else.

Who gets paid first?

The design partner, as chips ship. Broadcom’s AI chip revenue was $16.7 billion in the quarter to 2 August 2026, up 221% on a year earlier, and it guided to $21.7 billion for the next quarter. Alchip’s revenue rose to $241.7 million in the second quarter of 2026 from $132.4 million in the first, about 83% (our arithmetic), as the 3-nanometre accelerator started shipping. MediaTek expects its data-centre revenue to pass $2 billion in 2026.

The owner gets paid later, and in a different way. Google earns when cloud customers use TPU hours. Microsoft earns when Copilot and its other services answer requests. A lab such as Anthropic pays over years. Between the partner’s invoice and the owner’s first dollar sit packaging, racking and a powered hall.

Broadcom now measures its customers in gigawatts of data-centre power rather than chip counts. It expects Anthropic to deploy 1 gigawatt of Ironwood in 2026 and 5 gigawatts of the next TPU in 2027, with sight of 10 more in 2028. For OpenAI it plans 1.3 gigawatts of Jalapeño in 2027, and for Meta 3 gigawatts through 2028.

Those figures only turn into revenue for the owner once halls with that much power exist. That is why custom chips connect straight back to AI capex and to the hall-building clocks on the AI Data Centers layer.

Why do hyperscalers build their own chips?

To make each answer cheaper. Running a model, called inference, is a cost the owner pays every time a user asks something. A chip built for one company’s models can drop features a general-purpose GPU carries and spend that power and silicon on the work that company actually runs.

The claims are the companies’ own. Microsoft says Maia 300 delivers about 40% more tokens per megawatt than leading GPU systems. Broadcom’s chief executive said a co-developed chip can run at half the cost of a GPU. Neither figure has been independently tested. When halls are short of power, tokens per megawatt is the number that matters, which is why inference is where custom chips land first. TPU vs GPU sets one custom chip against the GPU it competes with.

Microsoft draws the line clearly. On 12 October 2026 it said Maia becomes its primary inference system from 2027, at multi-gigawatt scale, while training stays on Nvidia and AMD. Our Maia 300 Catalyst note traces what that changes.

Where is the stuck step?

In packaging and memory, booked by the design partner. Every one of these chips is a large processor that has to be packaged beside high-bandwidth memory, which means a CoWoS slot at TSMC and HBM from one of three makers. Both are booked far ahead. How CoWoS works and what an interposer is explain the packaging itself.

The partners show it in how they spend. MediaTek’s board approved a discretionary $5 billion financing budget on 31 July 2026, partly to secure supply chain capacity. Its second accelerator, worked through with its packaging partner, is due in high volume only in 2028. A design partner that cannot get packaging slots cannot ship, however good the design.

Then comes the clock everyone shares: a powered hall. A chip shipped in December earns its owner nothing until the rack is plugged in. Who makes advanced packaging maps the packaging side of that wait.

What to check next

Broadcom’s fiscal fourth-quarter results, against its $21.7 billion AI revenue guide and any change in its six-customer count. MediaTek’s first accelerator entering production in the fourth quarter. Marvell’s custom revenue for its fiscal third quarter, the first in which Google’s purchases count toward its warrant. Microsoft’s Maia 300 deployments in 2027. The money side of the same story is in Broadcom’s chip financing Wire.

Common misconceptions

• People assume Google makes its own TPU. Actually Google designs it; Broadcom builds and ships it, and TSMC makes the silicon.
• People assume a custom chip is cheap to build. Actually it needs the same leading-edge wafers, CoWoS packaging and HBM as a GPU, booked just as far ahead.
• People assume the design partner owns the chip. Actually the owner does; Marvell’s filing gives Google the say over whether its custom product can be sold to anyone else.
• People assume custom chips replace GPUs. Actually they take work, mostly inference, inside the companies that design them; Microsoft keeps training on Nvidia and AMD.
• People assume a partner’s revenue means the owner is earning. Actually the partner is paid at shipment; the owner earns only once the chips run in a powered hall.

FAQ

Related: TPU; TPU vs GPU; who makes AI chips; hyperscaler; rack-scale AI; HBM.

Stack doors

Layer: Hyperscalers. Also: Semiconductors, Neoclouds, AI Data Centers. Markets: US, Taiwan.

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References